In the past, a method for producing a silicon wafer has been generally formed of the following processes. First, a slicing process is performed in which a silicon ingot pulled upwardly by a silicon single crystal pulling apparatus is sliced by a wire saw by using fine SiC powder to obtain silicon wafers in the shape of a thin disk. Then, a chamfering process is performed in which an outer edge portion of each silicon wafer is chamfered to prevent chipping and cracking in the silicon wafer obtained by slicing.
Next, a lapping process adopting a planetary motion method is performed, the lapping process in which a plurality of silicon wafers are sandwiched between cast-iron upper and lower turn tables and machined in order to remove strain on a surface of each silicon wafer, the strain caused by the slicing process, and make the silicon wafers have uniform thickness. At this time, the silicon wafers are lapped while receiving supply of free abrasive grains such as alumina.
Then, a wet etching process is performed in which a mechanically damaged layer generated in the chamfering process and the lapping process is removed. Then, a double-side polishing process in which mirror polishing is performed on both surfaces of the etched silicon wafers by the planetary motion method by using the free abrasive grains, an edge polishing process in which the edge portion is polished to a mirror-smooth state, and a single-side mirror polishing process in which mirror polishing is performed on one side of each wafer are performed. Finally, a cleaning process is performed in which the polishing agent and the foreign substances remaining on the polished wafers are removed to increase the cleanliness, and the production of silicon wafers is completed (refer to Patent Document 1).
With an increase in integration of electronic devices, the flatness standards for silicon wafers become more stringent. Of the processes of the semiconductor wafer production flow, a process having the largest effect on the flatness is a double-side polishing process in which mirror polishing is performed on both surfaces of the silicon wafers.
This double-side polishing apparatus includes upper and lower turn tables, a sun gear provided at the center of the upper face of the lower turn table, an internal gear provided next to the outer edge of the lower turn table, and a plurality of carriers. The carriers are rotatably sandwiched between the upper and lower turn tables, and each carrier has one or more carrier holes provided therein. The silicon wafers are held in these carrier holes and a load is applied downward by a pressing mechanism attached to the upper turn table with the silicon wafers being moved with the carriers relative to polishing pads attached to the upper and lower turn tables, whereby double-side polishing is performed on a plurality of wafers at the same time by batch processing.